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Account Name: Shenzhen Dongweixin Technology Co., Ltd
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| The Top 10 Common Issues in PCB Reverse Engineering (PCB Cloning) |
| Addtime：2015/6/10 9:09:56 Clidk：6895 |
1. Improper Placement of Silkscreen Characters
Silkscreen characters covering SMD pads cause significant inconvenience during component soldering and PCB continuity testing.
Characters designed too small make screen printing difficult, while oversized characters overlap with one another, becoming difficult to distinguish.
2. Unclear Processing Layer Order Instructions
When a single-sided board is designed on the TOP layer, if no instruction is given, the board may be fabricated on the wrong side, resulting in poor soldering when components are mounted.
For example, a four-layer board may be designed with the layer order TOP, mid1, mid2, BOTTOM, but if the fabrication process does not follow this exact sequence, clear instructions must be provided.
3. Using Fills to Draw Pads
When designing circuits, using fills to draw pads may pass DRC (Design Rule Check), but it is not feasible for manufacturing. This is because such pads cannot directly generate solder mask data. During solder mask application, the fill area will be covered by the solder mask, making component soldering difficult.
4. Aperture Settings for Single-Sided Pads
Single-sided pads generally do not require drilling. If drilling is needed, it must be clearly indicated, and the aperture should be designed as zero. If a value is entered, the drilling data will generate coordinates at that location, leading to problems.
If a single-sided pad requires drilling, it should be specially marked.
5. Overlapping Pads
Overlapping pads (except for surface-mount pads) mean overlapping holes. During the drilling process, repeated drilling at the same location can cause the drill bit to break, resulting in hole damage.
In multi-layer boards, when two holes overlap, one hole should be designed as an isolation pad and the other as a connection pad. Otherwise, the resulting film will show only an isolation pad, leading to scrapping.
6. Misuse of Graphic Layers
Adding useless traces on certain graphic layers—for example, designing five or more layers of traces on a four-layer board—will cause confusion.
To save effort, some designers (using Protel software as an example) draw all layers' traces on the Board layer, and also use the Board layer for dimension lines. When generating Gerber data, if the Board layer is not selected, traces may be omitted and circuits broken; or if the Board layer's dimension lines are selected, short circuits may occur. Therefore, it is essential to maintain complete and clear graphic layers during design.
Violating conventional design practices, such as placing components on the Bottom layer and the soldering surface on the Top layer, creates unnecessary complications.
7. Power/Ground Layers Used for Both Traces and Thermal Pads
When power or ground layers are designed with thermal pad patterns, the actual image on the finished PCB is reversed—all traces become isolation lines. Designers must be fully aware of this. When drawing isolation lines for multiple power supplies or ground planes, care must be taken not to leave gaps that could short-circuit two power supplies, nor to enclose areas that should remain connected.
8. Excessive Fills or Fills Drawn with Extremely Fine Lines
This may result in data loss during Gerber generation, producing incomplete Gerber files.
Fills are processed in Gerber data generation by drawing line by line, resulting in extremely large data volumes, which increases the complexity of data processing.
8. Grid Spacing Too Small in Large Copper Areas
When the spacing between grid lines in a large copper area is too small (less than 0.3 mm), during the PCB manufacturing process, after the pattern transfer development step, residual film fragments are likely to adhere to the board, causing broken traces.
10. Unclear Board Outline Design
Some customers design board outlines on multiple layers—such as Keep-out Layer, Board Layer, and Top Overlay Layer—but these outlines do not align with each other. This makes it difficult for the PCB manufacturer to determine which outline should be followed.
Any technical process faces various difficulties. The key lies in discovering patterns and summarizing lessons from the challenges. As Shenzhen PCB cloning company Century芯 puts it: being good at summarizing throughout the PCB reverse engineering process is an effective way to reduce errors in PCB cloning.
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